In recent years, the portable computer and telecommunications market has developed rapidly and has become a major driving force in the design and technology of the semiconductor integrated circuit. It has created a great need of high density and high speed read-only memories for notebook computers, mobile phones, portable CD players and so on. Read-only memories (ROMs), which are nonvolatile memories and retain their memory data whenever the power is turned off, have wide applications in the computer and electronic industry. These read-only memories are required for above systems to store permanent programs such as operating systems or applications software instead of conventional mass storage equipment.
Read only memory (ROM) devices comprise ROM cells for coding data and a periphery controlling devices to control the operation of the cells. Each bit of data is stored in a cell, which is a single n-channel transistor or ROM cell. As is well known in the art, the programming of the ROM is executed by controlling a threshold voltage of the MOS transistors constructing the memory cell by the implantation of dopant. There are two types of ROM array referred to as NOR type array and NAND type array for storing data. The NOR type ROM array consists of a set of MOS transistors connected in parallel to bit lines and has high speed operation but low bit density due to the large cell size resulting from the need of a bit line contact to every cell. The NAND type ROM structure, in which MOS transistors connected in series and has only one bit line contact for a series of cells, can be much smaller in area and exhibits higher packing density since there is no contact hole required in each array cell.
In general, mask ROM includes MOS devices with different threshold voltage for programming. Typically, the MOS transistors served as memory cells are designed to operate at the same threshold level and usually "ON" or in a logic "1" state. Some of the cell transistors are then programmed to be "OFF" or in a logic "0" state for data writing by raising their threshold voltage. For fabricating the normally "OFF" cell transistors in accordance with the designed storage circuit, a high-dosage opposite-type ion implantation into the channel regions can be adopted to increase the threshold voltage and therefore change the logic state from "1" to "0". The doped regions are usually referred as coding regions. Alternatively, selective thickening of the gate oxide or selective through-hole contact opening can replace the coding implantation to be the chosen programming method. Furthermore, the data writing can also be achieved by changing the transistors from enhancement mode to depletion mode.
A buried bit line ROM cell is by far the most competitive ROM structure of high density ROM memories because it is contactless and hence the cell size is smaller. However, when the cell dimension shrinks, the buried bit line N+ doping needs to be reduced to avoid the problem of short channel punch through. Low buried bit line resistance is also important because every cell will have a different bit line resistance to metal pick up contact. For example, there will be one contact for every 32 cells. C. C. Hsue et al., in U.S. Pat. No. 5,418,175, proposed a post-metal-programming ROM process for manufacturing ROM cells with high junction breakdown voltage, low junction capacitance and low buried N+ resistance which require higher breakdown voltage and higher speed circuits.
However, referring to U.S. Pat. No. 5,472,898 by G. Hong et al. and U.S. Pat. No. 5,683,925 by Irani et al., the prior art method has another drawback in that it is difficult to locate the pattern precisely on the photoresist for coding implant, that causes a side-diffusion effect and result in a higher bit line resistance. Besides, when the dopant is present in large quantities such that the concentration is in the channel, it causes "band-to-band" tunneling of current from the bit line to the substrate of the transistor. If this leakage current is large enough, it will cause all "0"s on this bit line look as though they were conducting "1"s.